H8S-2633 Datasheet, PDF (1239/1487 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Appendix A Instruction Set
Table A.4 Number of States per Cycle
Access Conditions
On-Chip Supporting
Module
External Device
8-Bit Bus
16-Bit Bus
Cycle
On-Chip 8-Bit
Memory Bus
16-Bit
Bus
2-State 3-State 2-State 3-State
Access Access Access Access
Instruction fetch
S_I 1
4
2
Branch address read S_J
4
6 + 2m 2
3+m
Stack operation
S_K
Byte data access S_L
2
Word data access S_M
4
2
3+m
4
6 + 2m
Internal operation S_N 1
1
1
1
1
Legend:
m: Number of wait states inserted into external device access
1
1
Rev. 5.00 Mar 28, 2005 page 1177 of 1422
REJ09B0234-0500