CSR1001A04-IQQA-R Datasheet, PDF (34/45 Pages) –

8.3.4.1 Auxiliary ADC
Auxiliary ADC
Resolution
Input voltage range^(a)
Accuracy
(Guaranteed monotonic)
Offset
Gain error
Input bandwidth
Conversion time
Sample rate^(b)
INL
DNL
Min
Typ
Max
Unit
-
-
10
Bits
0
-
VDD_AUX
V
-1
-
1
LSB
0
-
1
LSB
-1
-
1
LSB
-0.8
-
0.8
%
-
100
-
kHz
1.38
1.69
2.75
µs
-
-
700
Samples/s
(a) _{LSB size = VDD_AUX/1023}
(b) _{The auxiliary ADC is accessed through a VM function. The sample rate given is achieved as part of this function.}
8.3.4.2 Auxiliary DAC
Auxiliary DAC
Resolution
Supply voltage, VDD_ANA
Output voltage range
Full-scale output voltage
LSB size
Offset
Integral non-linearity
Settling time
Min
-
1.30
0
1.30
0
-1.32
-1
-
Typ
Max
Unit
-
10
Bits
1.35
1.40
V
-
VDD_AUX
V
1.35
1.40
V
1.32
2.64
mV
0
1.32
mV
0
1
LSB
-
250
ns
Important Note:
Access to the auxiliary DAC is firmware-dependent, for more information about its availability contact CSR.
Production Information
© Cambridge Silicon Radio Limited 2011-2013
Page 33 of 44
CS-216358-DSP5
www.csr.com