CSR1001A04-IQQA-R Datasheet, PDF (22/45 Pages) –

4 Microcontroller, Memory and Baseband Logic
ADCs
Bluetooth and
Auxiliary Analogue
Control
DACs
Bluetooth low energy Modem
and LC
Wake-ups
I²C EEPROM
Serial Flash
AES-CCS and
AES
Encryption
I²C / Serial Flash
I²C /
Serial
Flash
DMA
Debug
RAM Interface
(Buffers, LUTs, Tables and State)
RAM Arbiter
I/O
RAM
UART
Memory Protection
Code
Data
Interrupt
PIO and
LED PWM
AUX / CLK /
PSU Control
MCU
Debug
Timer
I/O
Control Logic
PIOs
Figure 4.1: Baseband Digits Block Diagram
4.1 System RAM
64KB of integrated RAM supports the RISC MCU and is shared between the ring buffers used to hold data for each
active connection and the general-purpose memory required by the Bluetooth stack.
4.2 Internal ROM
CSR1001 QFN has 64KB of internal ROM. This memory is provided for system firmware implementation. If the
internal ROM holds valid program code, on boot-up, this is copied into the program RAM.
4.3 Microcontroller
The MCU, interrupt controller and event timer run the Bluetooth software stack and control the Bluetooth radio and
external interfaces. A 16-bit RISC microcontroller is used for low power consumption and efficient use of memory.
4.4 Programmable I/O Ports, PIO and AIO
32 lines of programmable bidirectional I/O are provided. They are all powered from VDD_PADS.
PIO lines are software-configurable as weak pull-up, weak pull-down, strong pull-up or strong pull-down.
Note:
At reset all PIO lines are inputs with weak pull-downs.
Production Information
© Cambridge Silicon Radio Limited 2011-2013
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CS-216358-DSP5
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