CSR1001A04-IQQA-R Datasheet, PDF (29/45 Pages) –

6.3.1 Digital Pin States on Reset
Table 6.1 shows the pin states of CSR1001 QFN on reset. PU and PD default to weak values unless specified
otherwise.
Pin Name / Group
I2C_SDA
I2C_SCL
PIO[31:0]
On Reset
Strong PU
Strong PU
Weak PD
Table 6.1: Pin States on Reset
6.3.2 Power-on Reset
Table 6.2 shows how the power-on reset occurs.
Power-on Reset
Reset release on VDD_DIG rising
Reset assert on VDD_DIG falling
Reset assert on VDD_DIG falling (Sleep mode)
Hysteresis
Typ
Unit
1.05
1.00
V
0.60
50
mV
Table 6.2: Power-on Reset
Production Information
© Cambridge Silicon Radio Limited 2011-2013
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CS-216358-DSP5
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