HYB25DC512800B Datasheet, PDF (7/35 Pages) Qimonda AG – 512-Mbit Double-Data-Rate SDRAM

Internet Data Sheet
HYB25DC512[80/16]0B[E/F]
Double-Data-Rate SDRAM
Ball#/Pin#
Name
42
A12
NC
17
A13
NC
Power Supplies
49
V_REF
3, 9, 15, 55, 61 V_DDQ
1, 18, 33
V_DD
6, 12, 52, 58, 64 V_SSQ
34
V_SS
Pin
Type
I
Buffer
Type
SSTL
NC
—
I
SSTL
NC
—
AI
—
PWR —
PWR —
PWR —
PWR —
Function
Address Signal 12
Note: Module based on 256 Mbit or larger dies
Note: Module based on 128 Mbit or smaller dies
Address Signal 13
Note: 1 Gbit based module
Note: Module based on 512 Mbit or smaller dies
I/O Reference Voltage
I/O Driver Power Supply
Power Supply
Power Supply
Power Supply
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Description
Standard input-only pin. Digital levels
Output. Digital levels
I/O is a bidirectional input/output signal
Input. Analog levels
Power
Ground
Not Connected
TABLE 4
Abbreviations for Pin Type
Abbreviation
SSTL
LV-CMOS
CMOS
OD
TABLE 5
Abbreviations for Buffer Type
Description
Serial Stub Terminalted Logic (SSTL2)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR
Rev. 1.2, 2007-04
7
04112007-FHBX-O8HD