HYB25DC512800B Datasheet, PDF (11/35 Pages) Qimonda AG – 512-Mbit Double-Data-Rate SDRAM

Internet Data Sheet
HYB25DC512[80/16]0B[E/F]
Double-Data-Rate SDRAM
Ball#/Pin#
Name
Pin
Type
A7, F8, M7
V_DD
A1, B8, C2, D8, V_SSQ
E2
PWR
PWR
A3, F2, M3
V_SS
PWR
Not Connected ×8 Organization
B1, B9, C1, C9, NC
NC
D1, D9, E1, E7,
E9, F7, F9
Not Connected ×16 Organization
F9
NC
NC
Buffer
Type
—
—
—
—
—
Function
Power Supply
Power Supply
Power Supply
Not Connected
Not Connected
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Description
Standard input-only pin. Digital levels
Output. Digital levels
I/O is a bidirectional input/output signal
Input. Analog levels
Power
Ground
Not Connected
TABLE 7
Abbreviations for Pin Type
Abbreviation
SSTL
LV-CMOS
CMOS
OD
TABLE 8
Abbreviations for Buffer Type
Description
Serial Stub Terminalted Logic (SSTL2)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR
Rev. 1.2, 2007-04
11
04112007-FHBX-O8HD