HYB25DC512800B Datasheet, PDF (22/35 Pages) Qimonda AG – 512-Mbit Double-Data-Rate SDRAM

Internet Data Sheet
HYB25DC512[80/16]0B[E/F]
Double-Data-Rate SDRAM
Parameter
Symbol
Values
TABLE 19
Input and Output Capacitances
Unit Note/ Test Condition
Min. Typ. Max.
Input Capacitance: CK, CK
C_I1
2.0 — 3.0 pF TSOP¹⁾
1.5 — 2.5 pF FBGA ¹⁾
Delta Input Capacitance
Input Capacitance: All other input-only pins
C_dI1
— — 0.25 pF ¹⁾
C_I2
2.0 — 3.0 pF TSOP¹⁾
1.5 — 2.5 pF FBGA ¹⁾
Delta Input Capacitance: All other input-only pins
Input/Output Capacitance: DQ, DQS, DM
C_dIO
C_IO
——
4.0 —
3.5 —
0.5 pF ¹⁾
5.0 pF TSOP¹⁾²⁾
4.5 pF FBGA ¹⁾²⁾
Delta Input/Output Capacitance: DQ, DQS, DM
C_dIO
— — 0.5 pF ¹⁾
1) These values are guaranteed by design and are tested on a sample base only. V_DDQ = V_DD = 2.5 V ± 0.2 V, f = 100 MHz, T_A = 25 °C,
V_OUT(DC) = V_DDQ/2, V_OUT (Peak to Peak) 0.2 V. Unused pins are tied to ground.
2) DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching at the
board level.
Rev. 1.2, 2007-04
22
04112007-FHBX-O8HD