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HYS72D32300 Datasheet, PDF (42/50 Pages) Qimonda AG – 184-Pin Registered Double Data Rate SDRAM Module
Product Type
Internet Data Sheet
HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C
Registered Double Data Rate SDRAM
Organization
Label Code
JEDEC SPD Revision
Byte# Description
24
25
26
27
28
29
30
31
32
33
34
35
36 - 40
41
42
43
44
45
46
47
48 - 61
62
63
64
65
66
tAC SDRAM @ CLmax -0.5 [ns]
tCK @ CLmax -1 (Byte 18) [ns]
tAC SDRAM @ CLmax -1 [ns]
tRPmin [ns]
tRRDmin [ns]
tRCDmin [ns]
tRASmin [ns]
Module Density per Rank
tAS, tCS [ns]
tAH, tCH [ns]
tDS [ns]
tDH [ns]
Not used
tRCmin [ns]
tRFCmin [ns]
tCKmax [ns]
tDQSQmax [ns]
tQHSmax [ns]
not used
DIMM PCB Height
Not used
SPD Revision
Checksum of Byte 0-62
Manufacturer’s JEDEC ID Code (1)
Manufacturer’s JEDEC ID Code (2)
Manufacturer’s JEDEC ID Code (3)
Rev. 1.32, 2007-03
03292006-Q22P-G7TH
256MB
512MB
1 GByte
×72
×72
×72
1 Rank (×8)
1 Rank (×4)
2 Ranks (×4)
PC2100R–20330 PC2100R–20331 PC2100R–20330
Rev. 0.0
Rev. 1.0
Rev. 0.0
HEX
75
00
00
50
3C
50
2D
40
90
90
50
50
00
41
4B
30
32
75
00
00
00
00
CB
7F
7F
7F
HEX
75
00
00
50
3C
50
2D
80
90
90
50
50
00
41
4B
30
32
75
00
00
00
10
14
7F
7F
7F
HEX
75
00
00
50
3C
50
2D
80
90
90
50
50
00
41
4B
30
32
75
00
00
00
00
05
7F
7F
7F
42