HYS72D32300 Datasheet, PDF (33/50 Pages) Qimonda AG – 184-Pin Registered Double Data Rate SDRAM Module

Product Type
Internet Data Sheet
HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C
Registered Double Data Rate SDRAM
TABLE 19
HYS72D[32/64]3x0HBR-5-C
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Description
Programmed SPD Bytes in E2PROM
Total number of Bytes in E2PROM
Memory Type (DDR = 07h)
Number of Row Addresses
Number of Column Addresses
Number of DIMM Ranks
Data Width (LSB)
Data Width (MSB)
Interface Voltage Levels
t_CK @ CL_max (Byte 18) [ns]
t_AC SDRAM @ CL_max (Byte 18) [ns]
Error Correction Support
Refresh Rate
Primary SDRAM Width
Error Checking SDRAM Width
t_CCD [cycles]
Burst Length Supported
Number of Banks on SDRAM Device
CAS Latency
CS Latency
Write Latency
DIMM Attributes
Component Attributes
t_CK @ CL_max -0.5 (Byte 18) [ns]
Rev. 1.32, 2007-03
03292006-Q22P-G7TH
256MB
512MB
512MB
×72
×72
×72
1 Rank (×8)
1 Rank (×4)
2 Ranks (×8)
PC3200R–30331 PC3200R–30331 PC3200R–30331
Rev. 1.0
Rev. 1.0
Rev. 1.0
HEX
80
08
07
0D
0A
01
48
00
04
50
50
02
82
08
08
01
0E
04
1C
01
02
26
C1
60
HEX
80
08
07
0D
0B
01
48
00
04
50
50
02
82
04
04
01
0E
04
1C
01
02
26
C1
60
HEX
80
08
07
0D
0A
02
48
00
04
50
50
02
82
08
08
01
0E
04
1C
01
02
26
C1
60
33