HYS72D32300 Datasheet, PDF (15/50 Pages) Qimonda AG – 184-Pin Registered Double Data Rate SDRAM Module

Product Type
Internet Data Sheet
HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C
Registered Double Data Rate SDRAM
TABLE 12
I_DD Specification for HYS72D[256/128/64/32]3xxx[G/H]BR–6–C
Unit Note/ Test Conditions^{1) 2)}
Organization 256 MB
512 MB
512 MB
1 GB
×72
×72
×72
×72
1 Rank
1 Rank
2 Ranks
2 Ranks
–6
–6
–6
–6
Symbol
Typ. Max. Typ. Max. Typ. Max. Typ. Max.
I_DD0
1000 1190 1790 2110 1540 1780 2870 3290 mA ³⁾
I_DD1
1210 1410 2090 2420 1750 2000 3160 3600 mA ³⁾⁴⁾
I_DD2P
370 410 650 710 650 710 1220 1300 mA ⁵⁾
I_DD2F
780 880 1250 1400 1250 1400 2200 2440 mA ⁵⁾
I_DD2Q
480 580 890 1050 890 1050 1690 1980 mA ⁵⁾
I_DD3P
430 500 780 640 780 890 1480 1660 mA ⁵⁾
I_DD3N
840 950 1380 1540 1380 1540 2450 2730 mA ⁵⁾
I_DD4R
1210 1410 2090 2420 1750 2000 3160 3600 mA ³⁾⁴⁾
I_DD4W
1250 1450 2180 2510 1790 2040 3250 3690 mA ³⁾
I_DD5
1420 1820 2750 3510 1960 2410 3830 4690 mA ³⁾
I_DD6
320 370 580 640 580 640 1110 1190 mA ⁵⁾
I_DD7
2200 2580 4070 4760 2740 3170 5140 5940 mA ³⁾⁴⁾
1) Test condition for maximum values: V_DD = 2.7 V, T_A = 10 °C
2) Module I_DD is calculated on the basis of component I_DD and includes Register and PLL
3) The module I_DD values are calculated from the component I_DD datasheet values are: n * I_DD × [component] for single bank modules
(n: number of components per module bank)n * I_DD × [component] + n * I_DD3N [component] for two bank modules (n: number of
components per module bank)
4) DQ I/O (I_DDQ) currents are not included into calculations: module IDD values will be measured differently depending on load conditions
5) The module I_DD values are calculated from the component I_DD datasheet values are: n * I_DD × [component] for single bank modules
(n: number of components per module bank)2 * n * I_DD × [component] for single two bank modules (n: number of components per module
bank)
Rev. 1.32, 2007-03
15
03292006-Q22P-G7TH