HYS72D32300 Datasheet, PDF (12/50 Pages) Qimonda AG – 184-Pin Registered Double Data Rate SDRAM Module

Internet Data Sheet
HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C
Registered Double Data Rate SDRAM
Parameter
Symbol
Values
Unit Note¹⁾/Test Condition
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Input Voltage Level, CK and
CK Inputs
V_IH(DC)
V_IL(DC)
V_IN(DC)
Input Differential Voltage, CK V_ID(DC)
and CK Inputs
VI-Matching Pull-up Current VI_Ratio
to Pull-down Current
Input Leakage Current
I_I
Min.
V_REF + 0.15
–0.3
–0.3
Typ.
—
—
—
0.36
—
0.71
—
–2
—
Max.
V_DDQ + 0.3 V
6)
V_REF – 0.15 V
6)
V_DDQ + 0.3 V
6)
V_DDQ + 0.6 V
6)7)
1.4
—
8)
2
µA Any input 0 V ≤ V_IN ≤ V_DD; All
other pins not under test = 0 V
6)9)
Output Leakage Current
I_OZ
–5
Output High Current, Normal I_OH
—
Strength Driver
—
5
µA DQs are disabled; 0 V ≤ V_OUT ≤
V_DDQ
—
–16.2
mA V_OUT = 1.95 V
Output Low Current, Normal I_OL
16.2
—
—
Strength Driver
mA V_OUT = 0.35 V
1) 0 °C ≤ T_A ≤ 70 °C
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions, V_DDQ must be less than or equal to V_DD.
4) Peak to peak AC noise on V_REF may not exceed ± 2% V_{REF (DC)}. V_REF is also expected to track noise variations in V_DDQ.
5) V_TT is not applied directly to the device. V_TT is a system supply for signal termination resistors, is expected to be set equal to V_REF, and
must track variations in the DC level of V_REF.
6) Inputs are not recognized as valid until V_REF stabilizes.
7) V_ID is the magnitude of the difference between the input level on CK and the input level on CK.
8) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire temperature and
voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the maximum difference between
pull-up and pull-down drivers due to process variation.
9) Values are shown per DDR SDRAM component
Rev. 1.32, 2007-03
12
03292006-Q22P-G7TH