HYS72D32300 Datasheet, PDF (22/50 Pages) Qimonda AG – 184-Pin Registered Double Data Rate SDRAM Module

Product Type
Internet Data Sheet
HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C
Registered Double Data Rate SDRAM
Organization
Label Code
JEDEC SPD Revision
Byte# Description
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36 - 40
41
Error Correction Support
Refresh Rate
Primary SDRAM Width
Error Checking SDRAM Width
t_CCD [cycles]
Burst Length Supported
Number of Banks on SDRAM Device
CAS Latency
CS Latency
Write Latency
DIMM Attributes
Component Attributes
t_CK @ CL_max -0.5 (Byte 18) [ns]
t_AC SDRAM @ CL_max -0.5 [ns]
t_CK @ CL_max -1 (Byte 18) [ns]
t_AC SDRAM @ CL_max -1 [ns]
t_RPmin [ns]
t_RRDmin [ns]
t_RCDmin [ns]
t_RASmin [ns]
Module Density per Rank
t_AS, t_CS [ns]
t_AH, t_CH [ns]
t_DS [ns]
t_DH [ns]
Not used
t_RCmin [ns]
Rev. 1.32, 2007-03
03292006-Q22P-G7TH
256MB
512MB
512MB
×72
×72
×72
1 Rank (×8)
1 Rank (×4)
2 Ranks (×8)
PC3200R–30331 PC3200R–30331 PC3200R–30331
Rev. 1.0
Rev. 1.0
Rev. 1.0
HEX
02
82
08
08
01
0E
04
1C
01
02
26
C1
60
50
75
50
3C
28
3C
28
40
60
60
40
40
00
37
HEX
02
82
04
04
01
0E
04
1C
01
02
26
C1
60
50
75
50
3C
28
3C
28
80
60
60
40
40
00
37
HEX
02
82
08
08
01
0E
04
1C
01
02
26
C1
60
50
75
50
3C
28
3C
28
40
60
60
40
40
00
37
22