HYS72T32000HR Datasheet, PDF (26/67 Pages) Qimonda AG – 240-Pin Registered DDR2 SDRAM Modules

Internet Data Sheet
HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A
Registered DDR2 SDRAM Modules
FIGURE 2
Method for calculating transitions and endpoint
W+=
W536 7 H QG SRLQW
92+ [P9 
92+ [P9 
92/ [P9 
92/ [P9 
7 7
W+=W536 7 HQG SRLQ W  77 
977[P9
977[P9
977[P 9
977[P9
W/=
W53 5(EHJLQSRLQW
7 7
W/=W535( E HJLQ SRLQ W  7 7 
'46
'46 
&.
&.
W'6 W'+
W,6  W,+ 
FIGURE 3
Differential input waveform timing - t_DS and t_DS
W'6  W'+
9_' _{'4 }
9_,_+DF _PLQ 
9_,_+GF _PLQ 
9₅ _()GF
9_,_/GF _PD[ 
9_,_/DF _PD[ 
9₆ _6
FIGURE 4
Differential input waveform timing - t_lS and t_lH
W,6 W,+ 
9_' _{'4 }
9_,_{+DF }PLQ
9_,_{+GF }PLQ
9₅ _()GF
9_,_{/GF }PD[ 
9_,_{/DF }PD[ 
9₆ _6
Rev. 1.21, 2007-03
26
09152006-J5FK-C565