PM73122 Datasheet, PDF (431/489 Pages) PMC-Sierra, Inc – 32 LINK CES/DBCES AAL1 SAR PROCESSOR

RELEASED
DATASHEET
PMC-1981419
ISSUE 7
PM73122 AAL1GATOR-32
32 LINK CES/DBCES AAL1 SAR PROCESSOR
asserted until the last data byte/word. Note that RPHY_CLAV will be deasserted
along with the second data byte/word driven on the bus if the SRC_INTF does
not have another cell to send, as in Figure 99. This is because, in Any-PHY
mode, the RPHY_CLAV signal should always reflect the cell available status for
the next possible future transfer rather than the current one as in Utopia mode.
Figure 99 UI_SRC_INTF Start-of-Transfer Timing (Any-PHY PHY Mode)
RPHY_CLK(i)
RPHY_ADDR(i)
RPHY_ADDR3_CSB(i)
RPHY_CLAV(o)
RPHY_DATA(o)
RPHY_RSX(o)
RPHY_ENB(i)
RPHY_SOC(o)
Addr
Addr
Addr
D1
D2
Figure 100 below shows an example of the end of a cell transfer for the
SRC_INTF while in Any-PHY PHY slave mode. In this particular instance, the
SRC_INTF still does not have another cell to send for this particular address,
thus RPHY_CLAV is not asserted when polled.
Figure 100 UI_SRC_INTF End-of-Transfer Timing (Any-PHY PHY mode)
RPHY_CLK(i)
RPHY_ADDR(i)
Addr
RPHY_ADDR3_RCSB(i)
RPHY_CLAV(o)
RPHY_DATA(o) (16-bit)
D23
D24
D25
D26
D27
RPHY_DATA(o) (8-bit)
D49
D50
D51
D52
D53
RPHY_RSX(o)
RPHY_ENB(i)
RPHY_SOC(o)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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