PM73122 Datasheet, PDF (191/489 Pages) PMC-Sierra, Inc – 32 LINK CES/DBCES AAL1 SAR PROCESSOR

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DATASHEET
PMC-1981419
ISSUE 7
PM73122 AAL1GATOR-32
32 LINK CES/DBCES AAL1 SAR PROCESSOR
constant signaling for an entire multi-frame, then the multi-frame sync signal is
not required unless there is a desire to synchronize the multi-frame with the data
across the network. In general this is not necessary.
The AAL1gator-32 reads the signaling nibble for each channel when it reads the
last nibble of each channel’s data. See Figure 75 for an example of a T1 frame.
See Figure 76 for an example of an E1 frame.
Figure 75 Capture of T1 Signaling Bits
RL_SER
(timeslots ₎
1
Line Signals During the Last Frame of a
M ltif
2
3
...
22
23
24
RL_SIG
XXXX
ABCD
Channel 0
XXXX
ABCD
Channel 1
XXXX
ABCD
Channel 2
...
XXXX - indicates signaling is
i
d
... XXXX
ABCD
Channel 21
XXXX
ABCD
Channel 22
XXXX
ABCD
Channel 23
Figure 76 Capture of E1 Signaling Bits
RL_SER
(t imeslo ts₎
0
Line Signals During the Last Frame of a Mult iframe
1
2
...
29
30
31
RL_SIG
XX XX
AB CD
Channel 0
XX XX
AB CD
Channel 1
X XX X
A BCD
Channel 2
...
XXXX - indicates signaling is ignored
...
X
XX
X
AB CD
Channel 29
XX XX
A BCD
Channel 30
XX XX
AB CD
Channel 31
Note:
AAL1gator-32 treats all 32 timeslots identically. Although E1 data streams
contain 30 timeslots of channel data, 1 timeslot of framing (timeslot 0) and one
time slot that can either be signaling or data (time slot 16), data and signaling for
all 32 timeslots are stored in memory and can be sent and received in cells.
11.6.3 Transmit Direction
In the line transmit direction, for structured data, the Line Interface Block may
take the TL_SYNC input signal and depending on the value of
MF_SYNC_MODE interpret the signal as either a frame pulse or multi-frame
pulse. Alternatively if GEN_SYNC in LIN_STR_MODE memory register is high
for that line, then the Line Interface Block will take the frame pulse or multi-
frame pulse generated by the A1SP Block for the local link and output that signal
to the TL_SYNC[n] pin on the external lines. Whether the Line Interface Block
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