PM73122 Datasheet, PDF (337/489 Pages) PMC-Sierra, Inc – 32 LINK CES/DBCES AAL1 SAR PROCESSOR

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DATASHEET
PMC-1981419
ISSUE 7
PM73122 AAL1GATOR-32
32 LINK CES/DBCES AAL1 SAR PROCESSOR
Register 0x8040EH: Extract Depth Check Interrupt Status Register
(EXT_DCR_INT)
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
Rsvd
Rsvd
Rsvd
Rsvd
Rsvd
Rsvd
Rsvd
Rsvd
RO
RO
RO
RO
RO
RO
RO
R2C
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SPE[1]
SPE[0]
SBI_TRIBUTARY[4]
SBI_TRIBUTARY[3]
SBI_TRIBUTARY[2]
SBI_TRIBUTARY[1]
SBI_TRIBUTARY[0]
DCR_INTI
Default
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
Back to back reads of this register must be at least 250 ns apart.
DCR_INTI
This bit is set when a Depth Check error is detected. This error is detected
when the internal FIFO pointers don’t match the expected internal FIFO
depth.
Values in these fields should only be looked at when DCR_INTI is a ‘1’.
SPE[1:0] and SBI_TRIBUTARY
The SPE and SBI_TRIBUTARY fields are used to specify which Tributary was
associated with the Depth Check error. Note that if mapping is enabled the
SBI Tributary is different than the internal link. Also note that SPEs are
numbered 1,2,3.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
312