PM73122 Datasheet, PDF (399/489 Pages) PMC-Sierra, Inc – 32 LINK CES/DBCES AAL1 SAR PROCESSOR

RELEASED
DATASHEET
PMC-1981419
ISSUE 7
PM73122 AAL1GATOR-32
32 LINK CES/DBCES AAL1 SAR PROCESSOR
Register 0x84000H: DLL Configuration Register (DLL_CFG_REG)
Bit
15:6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
Function
Unused
Reserved
OVERRIDE
Unused
Reserved
Reserved
Reserved
Default
X
0
0
X
0
0
0
The DLL Configuration Register controls the basic operation of the DLL.
OVERRIDE:
The override control (OVERRIDE) disables the DLL operation. When
OVERRIDE is set low, the DLL generates the clock by delaying the SYS_CLK
until the rising edge of internal SYS_CLK occurs at the same time as the
rising edge of external SYS_CLK. When OVERRIDE is set high, the clock
output is a buffered version of the SYS_CLK input.
Note that when clearing the OVERRIDE bit, the DLL should be reset so that it
acquires sync cleanly. The RUN bit is only cleared by a DLL reset so it will
give a false indication if the DLL is not reset.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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