NPIC6C4894_15 Datasheet, PDF(7/21 Page) NXP Semiconductors – Power logic 12-bit shift register open-drain outputs

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NPIC6C4894_15 Datasheet, PDF (7/21 Pages) NXP Semiconductors – Power logic 12-bit shift register open-drain outputs

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NXP Semiconductors

NPIC6C4894

Power logic 12-bit shift register; open-drain outputs

8.1 Test circuit and waveform

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(1) The word generator has the following characteristics: tr, tf ï£ 10 ns; ZO = 50 ï.

(2) The input pulse duration (tW) is increased until peak current IAL = 200 mA. Energy test level is defined as:

EAS = IAL ï´ V(BR)DSS ï´ tAL/2 = 30 mJ.

Fig 8. Test circuit and waveform for measuring single-pulse avalanche energy

9. Recommended operating conditions

Table 5.

Symbol

VCC

Tamb

Recommended operating conditions

Parameter

Conditions

supply voltage

input voltage

drain current

pulsed drain output current;

VCC = 5 V; Tamb = 25 ï°C;

all outputs on

ambient temperature

[1] Pulse duration ï£ 100 ïs and duty cycle ï£ 2 %.

[2] Technique should limit Tj ï Tamb to 10 ï°C maximum.

Min Typ

4.5

5.0

[1][2] -

Max Unit

5.5

250 mA

ï40

+125 ï°C

NPIC6C4894

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 â 17 April 2014

7 of 21

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