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| NPIC6C4894_15 Datasheet, PDF (10/21 Pages) NXP Semiconductors – Power logic 12-bit shift register open-drain outputs | |||
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NXP Semiconductors
NPIC6C4894
Power logic 12-bit shift register; open-drain outputs
11.1 Waveforms and test circuits
9,
&3LQSXW
*1'
92+
46RXWSXW
92/
92+
46RXWSXW
92/
IFON PD[
90
W:
W:
W3/+
90
W7/+
90
W7/+
W3+/
W7+/
W3+/
W7+/
DDD
Fig 9.
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Propagation delay clock (CP) to output (QS1, QS2), clock pulse width, maximum clock frequency and
output transition time
9,
&3LQSXW
*1'
9
43QRXWSXW
92/
90
W3/=
9;
W3=/
9<
DDD
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 10. Propagation delay clock (CP) to output (QPn)
NPIC6C4894
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 17 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
10 of 21
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