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| NPIC6C4894_15 Datasheet, PDF (6/21 Pages) NXP Semiconductors – Power logic 12-bit shift register open-drain outputs | |||
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NXP Semiconductors
NPIC6C4894
Power logic 12-bit shift register; open-drain outputs
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
ï0.5 +7.0
V
VI
input voltage
ï0.3 +7.0
V
VDS
drain-source voltage
QPn
[1] -
+33
V
VO
output voltage
QSn
ï0.5 +7.0
V
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
-
ï±50
mA
IOK
output clamping current
QSn; VO < 0.5 V or VO > VCC + 0.5 V
-
ï±100
mA
Id(SD)
source-drain diode current continuous
pulsed
-
250
mA
[2] -
500
mA
ID
drain current
Tamb = 25 ï°C
continuous; each output; all outputs
-
100
mA
on
pulsed; each output; all outputs on
[2] -
250
mA
IDM
peak drain current
single output; Tamb = 25 ï°C
[2] -
250
mA
EAS
non-repetitive avalanche single pulse; see Figure 8 and
[3] -
30
mJ
energy
Figure 16
IAL
avalanche current
see Figure 8 and Figure 16
Tstg
storage temperature
Ptot
total power dissipation
Tamb = 25 ï°C
[3] -
200
mA
ï65
+150
ï°C
[4]
SO20
-
1500
mW
TSSOP20
-
1250
mW
Tamb = 125 ï°C
[4]
SO20
-
300
mW
TSSOP20
-
250
mW
[1] Each power EDNMOS source is internally connected to GND.
[2] Pulse duration ï£ 100 ïs and duty cycle ï£ 2 %.
[3] VDS = 15 V; starting junction temperature (Tj) = 25 ï°C; L = 1.5 H; avalanche current (IAL) = 200 mA.
[4] For SO20 package: above 25 ï°C the value of Ptot derates linearly with 12 mW/ï°C.
For TSSOP20 package: above 25 ï°C the value of Ptot derates linearly with 10 mW/ï°C.
NPIC6C4894
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 17 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
6 of 21
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