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PSMN020-30MLC_15 Datasheet, PDF (5/13 Pages) NXP Semiconductors – N-channel 30 V 18.1 mΩ logic level MOSFET in LFPAK33 using TrenchMOS Technology
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NXP Semiconductors
PSMN020-30MLC
N-channel 30 V 18.1 mΩ logic level MOSFET in LFPAK33 using
TrenchMOS Technology
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 13.5 A; VGS = 0 V; Tj(init) = 25 °C;
tp ≤ 50 µs
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C
voltage
ΔVGS(th)/ΔT
gate-source threshold
voltage variation with
temperature
IDSS
drain leakage current VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 150 °C
IGSS
gate leakage current VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
RDSon
drain-source on-state VGS = 4.5 V; ID = 5 A; Tj = 25 °C;
resistance
Fig. 10
VGS = 4.5 V; ID = 5 A; Tj = 150 °C;
Fig. 10; Fig. 11
VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 10
VGS = 10 V; ID = 5 A; Tj = 150 °C;
Fig. 10; Fig. 11
RG
gate resistance
f = 1 MHz
Dynamic characteristics
QG(tot)
total gate charge
ID = 5 A; VDS = 15 V; VGS = 10 V;
Fig. 12; Fig. 13
ID = 5 A; VDS = 15 V; VGS = 4.5 V;
Fig. 12; Fig. 13
ID = 0 A; VDS = 0 V; VGS = 10 V
QGS
QGS(th)
gate-source charge
pre-threshold gate-
source charge
ID = 5 A; VDS = 15 V; VGS = 4.5 V;
Fig. 12; Fig. 13
QGS(th-pl)
post-threshold gate-
source charge
QGD
gate-drain charge
VGS(pl)
gate-source plateau
voltage
ID = 5 A; VDS = 15 V; Fig. 12; Fig. 13
PSMN020-30MLC
All information provided in this document is subject to legal disclaimers.
Product data sheet
4 September 2012
Min Typ Max Unit
34
-
-
V
30
-
-
V
27
-
-
V
1.05 1.62 1.95 V
-
-3.5 -
mV/K
-
-
1
µA
-
-
100 µA
-
-
100 nA
-
-
100 nA
-
20.5 27
mΩ
-
-
43.2 mΩ
-
14.7 18.1 mΩ
-
-
29
mΩ
0.68 1.37 2.74 Ω
-
9.5 -
nC
-
4.6 -
nC
-
8.4 -
nC
-
1
-
nC
-
0.3 -
nC
-
0.7 -
nC
-
1.7 -
nC
-
2.4 -
V
© NXP B.V. 2012. All rights reserved
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