SAA8116 Datasheet, PDF (40/60 Pages) NXP Semiconductors – Digital PC-camera signal processor including microcontroller and USB interface

Philips Semiconductors
Digital PC-camera signal processor including
microcontroller and USB interface
Product specification
SAA8116
Audio and power-management registers
A first MOVX@DPTR instruction enables to select the module (via DPH) and send the command. A second one
communicates the data (read or write).
Table 43 Register list
ADDRESS
NAME
FUNCTION
Write registers
0 0x00H AUDIO_CLOCKS
audio clocks control
1 0x01H RSTGEN
reset generator control
2 0x02H ANALOG_POWER
analog power control
3 0x03H POWERMGT_N1
timer N1 (by default = 24)
4 0x04H POWERMGT_N2
timer N2 (by default = 57)
5 0x05H AUDIO
audio properties control
Read register
6 0x06H POWERMGT_STATUS power management status bits (read register)
FORMAT
see Table 44
see Table 45
see Table 46
byte
byte
see Table 47
see Table 48
Table 44 Register AUDIO_CLOCKS (address: 0x00H)
BIT
76543210
PARAMETER
SET_DIVIDE: set clock dividers for ADC
00
divide by 1 (by default)
01
divide by 2
10
divide by 4
11
divide by 8
X
reserved
DIS_CLK_AD: disable 48 MHz clock (ADC)
0
enabled (by default)
1
disabled
X
reserved
FCODE: set the PLL frequency
00
256 × 44.1 KHz (by default)
01
256 × 32 KHz
10
256 × 48 KHz
11
256 × 44.1 KHz
X reserved
2001 May 04
40