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SAA8116 Datasheet, PDF (23/60 Pages) NXP Semiconductors – Digital PC-camera signal processor including microcontroller and USB interface
Philips Semiconductors
Digital PC-camera signal processor including
microcontroller and USB interface
Product specification
SAA8116
ADDRESS
NAME
FUNCTION
FORMAT
RANGE
87 0x57H TR_HEADER #7
data for header byte no. 7
byte
88 0x58H TR_TRAILER #0
data for trailer byte no. 0
byte
89 0x59H TR_TRAILER #1
data for trailer byte no. 1
byte
90 0x5AH TR_TRAILER #2
data for trailer byte no. 2
byte
91 0x5BH TR_TRAILER #3
data for trailer byte no. 3
byte
92 0x5CH TR_HT_CONTROL
header trailer control
see Table 19 n.a.
93 0x5DH SMP_PERIOD
SMP period in
units 4 × clk48_period
byte
1 + [0 to 255]
94 0x5EH SMP_LOWTIME
SMP low time in units
4 × clk48_period
byte
1 + [0 to 255]
95 0x5FH reserved
96 0x60H PPG_CONTROL_0
PPG control register 0
(by default = 0)
see Table 20 n.a.
97 0x61H PPG_CONTROL_1
PPG control register 1
(by default = 64)
see Table 21 n.a.
98 0x62H PPG_H_CTRL
controls mode of FH1; FH2
and RG (by default = 0)
see Table 22 n.a.
99 0x63H PPG_V_INV
controls inversion of vertical FV1; see Table 23 n.a.
FV2; FV3; FV4 and ROG signals
(by default = 0)
100 0x64H PPG_H_INV
controls inversion of horizontal
signals (by default = 0)
see Table 24 n.a.
101 0x65H PPG_MISC_INV
controls inversion of misc. signals see Table 25 n.a.
and sets additional mode controls
(by default = 0)
102 0x66H PPG_SHUTTERSPEED_V_LSB shutter speed line number
(by default = 0)
see Table 26
103 0x67H PPG_SHUTTERSPEED_H_LSB shutter speed CRST start
(by default = 0)
see Table 27
104 0x68H PPG_SHUTTERSPEED_MSB
MSB for shutter speed control
(line number; CRST start)
(by default = 0)
see Table 28 n.a.
105 0x69H PPG_BCP_START_LSB
starting position control for BCP see Table 29
pulse (by default = 0)
106 0x6AH PPG_BCP_STOP_LSB
stopping position control for BCP see Table 30
pulse (by default = 0)
107 0x6BH PPG_DCP_START_LSB
starting position control for DCP see Table 31
pulse (by default = 0)
108 0x6CH PPG_DCP_STOP_LSB
stopping position control for DCP see Table 32
pulse (by default = 0)
109 0x6DH PPG_BCP_DCP_MSB
MSB for start/stopping position
control for BCP/DCP pulses
(by default = 0)
see Table 33
110 0x6EH PPG_ROG1_START_LSB
starting position control for ROG1 see Table 34
pulse (by default = 0)
2001 May 04
23