SAA8116 Datasheet, PDF (39/60 Pages) NXP Semiconductors – Digital PC-camera signal processor including microcontroller and USB interface

Philips Semiconductors
Digital PC-camera signal processor including
microcontroller and USB interface
Product specification
SAA8116
Table 41 Register PIN_CONFIG_0 (address: 0x7EH)
BIT
76543210
PARAMETER
XXXXXX
reserved
P4_SEL: when enabled; pins are configured as general purpose outputs; otherwise
they are connected to FV1; FV2 and FV3
0
disabled
1
enabled (by default)
ROG_SEL: select ROG signal according to CCD type
0 PPG output ROG1 (Sony and Sharp CCD application) (by default)
1 PPG output ROG2 (Panasonic CCD application)
Table 42 Register PIN_CONFIG_1 (address: 0x7FH)
BIT
76543210
PARAMETER
PR_DISABLE: control remote wake-up 2
0
enabled
1
disabled (by default)
SR_DISABLE: control remote wake-up 1
0
enabled
1
disabled (by default)
SPIF_SEL: select interface between sensor and preprocessor
0
use serial interface (by default)
1
use port P4[2 to 0]
ASCLK_SEL: select ASCLK clock
0
ASCLK = single pixel clock (by default)
1
ASCLK = double pixel clock
VSP_VH_SEL: select connection type of VSP pins V and H
00
V = external V pulse (input); H = PPG_HD (output); VSP_VIN = PPG_VD
01
V = external V pulse (input); H = VSP_HOUT (output);
VSP_VIN = external V pulse
10
V = PPG_VD (output); H = PPG_HD (output); VSP_VIN = PPG_VD
11
V= VSP_VOUT (output); H = VSP_HOUT (output); VSP_VIN = 0
PCLK_INV: control pixel clock
0
normal (by default)
1
inverted
VSP_CLK_SEL: select VSP clock
0 VSP_CLK = CLK1 from PPG (by default)
1 VSP_CLK = PCLK
2001 May 04
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