SAA8116 Datasheet, PDF (17/60 Pages) NXP Semiconductors – Digital PC-camera signal processor including microcontroller and USB interface

Philips Semiconductors
Digital PC-camera signal processor including
microcontroller and USB interface
Product specification
SAA8116
Universal serial bus 1.1 core
The USB core combines all functionalities for a USB 1.1
compliant full speed device. It formats the actual packets
(video and audio) that are transferred to the USB and
passes the incoming packets to the right end-point buffer.
The end-point setup is composed of control, generic and
isochronous types (see Table 4). All end-points can be
enabled or disabled, except control end-points.
All enabled end-points generate interrupts to the
embedded microcontroller when they need to be serviced.
The microcontroller can then use a set of commands via
the internal parallel interface.
The video FIFO size allows demarcation of the video
frames using one or more 0-length packets.
The core also includes VID class support for the video
end-point: headers and trailers enable data to be attached
to the video frames that are passed over the USB. Eight
1-byte registers are dedicated for the headers, while four
registers comprise the trailers. Each of the registers can be
programmed by the microcontroller. An extra register,
TR_HT_CONTROL, specifies how many bytes are
inserted before or after the video data.
Table 4 Mapping of logical to physical end-point numbers for the end-points
LOGICAL
END-POINT
0
1
2
3
4
5
PHYSICAL
END-POINT
0
1
2
3
4
5
6
7
END-POINT TYPE
control
control
generic
generic
generic
generic
isochronous
isochronous
DIRECTION
out
in
out
in
in
in
in
in
BUFFER SIZE
16
16
8
8
8
8
92
programmable
DOUBLE
BUFFERED
no
no
no
no
no
no
yes
multi-buffered
ATX interface
The SAA8116 contains an analog bus driver, called
the ATX. This driver incorporates a differential amplifier
and two single-ended buffers for the receiver part and two
single-ended buffers for the transmitter part.
The interface to the bus consists of a differential data pair
(ATXDN and ATXDP).
Microcontroller
The embedded microcontroller is an 80C654 core (80C51
family). Ports P0 and P2 (plus ALE and PSEN) are
available for connection to an emulator or to an external
program EPROM (32 kbytes max.).
The microcontroller can control the AOB, AE and AWB
loops, and can download the settings for the internal
registers from an optional EEPROM at power-up or reset.
A parallel interface is used to communicate with all internal
modules, based on the MOVX@DPTR instruction.
The microcontroller includes the following features:
• 32 kbytes internal ROM
• 512 bytes RAM
• Hardware multi-master I²C-bus interface (the
microcontroller can be used either as slave or master):
P1.7 and P1.6
• Power-down mode
• Two timers
• P0 and P2 are pull-up ports
• Three pins are available as general purpose inputs:
GPI1 (P4.6), GPI2 (P1.4) and GPI3 (P3.5).
2001 May 04
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