80CL31 Datasheet, PDF (4/40 Pages) NXP Semiconductors – Low-voltage single-chip 8-bit microcontrollers

Philips Semiconductors
Low-voltage single-chip 8-bit microcontrollers
Product specification
80CL31/80CL51
PIN DESCRIPTIONS
PIN
QFP
DIP
DESIGNATION
40
1
P1.O/INT2
41
2
P1.1/lNT3
42
3
P1.2/lNT4
43
4
P1.3/INT5
44
5
P1.4/lNT6
1
6
P1.5/lNT7
2
7
P1.6/lNT8
3
8
P1.7/lNT9
4
9
RST
5–13 10-17
5
10
P3.0/RXD/data
7
11
P3.1/TXD/clock
8
12
P3.2/lNT0
9
13
P3.3/lNT1
10
14
P3.4/T0
11
15
P3.5/T1
12
16
P3.6/WR
13
17
P3.7/RD
14
18
XTAL2
15
19
XTAL1
16
18-25
20
21-28
Vss
P2.0-P2.7
26
29
PSEN
27
30
ALE
29
31
EA
30-37 32-39 P0.0-P00.7
38
40
V_DD
FUNCTION
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pullups. Port 1 pins that have 1s written
to them are pulled HIGH by the internal pullups, and in that state can be used as inputs. The Port 1
output buffer can sink/source 4 LS TTL loads. As inputs, Port 1 pins that are externally pulled LOW
will source current (I_lL in the characteristics) due to the internal pullups. Port 1 also serves the
alternative functions INT2 to INT9.
Reset: A high level on this pin for two machine cycles while the oscillator is running resets the
device.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source 4 LS TTL inputs. Port 3 pins that have 1s written to them are pulled HIGH by the
internal pull ups, and in that state can be used as inputs. As inputs, Port 3 pins that are externally
pulled LOW will source current (I_lL in the characteristics) due to the internal pull ups.
RXD/data: Serial port receiver data input (asynchronous)or data input/output (synchronous)
TXD/clock: Serial port transmitter data output (asynchronous) or clock output (synchronous)
INT0: External interrupt 0.
INT1: External interrupt 1.
T0: Timer 0 external input.
T1: Timer 1 external input.
WR: External data memory write strobe.
RD: External data memory read strobe.
Crystal output: Output of the inverting amplifier of the oscillator. Left open when external clock is
used.
Crystal input: Input to the inverting amplifier of the oscillator; also the input for an externally gen-
erated clock source.
Crystal input: Input to the inverting amplifier of the oscillator; also the input for an externally
generated clock source.
Ground: Circuit ground potential.
Port 2: Port 2 is an 8-bit bidirectional 1/0 port with internal pullups. Port 2 pins that have 1s written
to them are pulled HIGH by the internal pullups, and in that state can be used as inputs. The Port 2
output buffer can sink/source 4 LS TTL loads.
Port 2 emits the high-order address byte during accesses to external memory that use 1 6-bit ad-
dresses (MOVX @DPTR). In this application it uses the strong internal pullups when emitting 1s.
During accesses to external memory that use 8-bit addresses (MOVX @Ri), Port 2 emits the con-
tents of the P2 Special Function Register.
Program store enable output: Read strobe to external program memory. When executing code
out of external program memory, PSEN is activated twice each machine cycle. However, during
each access to external data memory two PSEN activations are skipped.
Address Latch Enable: Output pulse for latching the low byte of the address during access to
external memory. ALE is emitted at a constant rate of 1/6 of the oscillator frequency, and may be
used for external timing or clocking purposes.
External Access: When EA is held High the CPU executes out of internal program memory (un-
less the program counter exceeds 0FFFH). Holding EA LOW forces the CPU to execute out of
external memory regardless of the value of the program counter.
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port. As an open drain output port it can sink 8
LS TTL loads. Port 0 pins that have 1s written to them float, and in that state will function as high
impedance inputs. Port 0 is also the multiplexed low order address and data bus during access to
external memory. In this application it uses strong internal pull-ups when emitting logic 1s.
Power supply.
January 1995
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