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PSMN4R0-60YS_15 Datasheet, PDF (2/13 Pages) NXP Semiconductors – N-channel LFPAK 60 V, 4.0 mΩ standard level FET
NXP Semiconductors
PSMN4R0-60YS
N-channel LFPAK 60 V, 4.0 mΩ standard level FET
Symbol
Parameter
Dynamic characteristics
QGD
gate-drain charge
QG(tot)
total gate charge
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-
source avalanche
energy
Conditions
VGS = 10 V; ID = 75 A; VDS = 30 V;
Fig. 14; Fig. 15
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A;
Vsup ≤ 60 V; RGS = 50 Ω; unclamped
[1] Continuous current is limited by package.
Min Typ Max Unit
-
11.2 -
nC
-
56
-
nC
-
-
170 mJ
5. Pinning information
Table 2. Pinning information
Pin
Symbol Description
Simplified outline
1
S
source
mb
2
S
source
3
S
source
4
G
mb
D
gate
mounting base; connected to
drain
1234
LFPAK56; Power-
SO8 (SOT669)
Graphic symbol
D
G
mbb076 S
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
PSMN4R0-60YS
LFPAK56;
Power-SO8
Description
Plastic single-ended surface-mounted package (LFPAK56;
Power-SO8); 4 leads
Version
SOT669
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
VDGR
drain-gate voltage
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
VGS
gate-source voltage
Ptot
total power dissipation
Tmb = 25 °C; Fig. 1
ID
drain current
Tmb = 100 °C; Fig. 2
PSMN4R0-60YS
Product data sheet
All information provided in this document is subject to legal disclaimers.
14 May 2015
Min Max Unit
-
60
V
-
60
V
-20 20
V
-
130 W
-
74
A
© NXP Semiconductors N.V. 2015. All rights reserved
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