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SAA5X9X Datasheet, PDF (19/68 Pages) NXP Semiconductors – Economy teletext and TV microcontrollers
Philips Semiconductors
Economy teletext and TV microcontrollers
Preliminary specification
SAA5x9x family
7.4.2 SPECIAL FUNCTION REGISTERS BIT DESCRIPTIONS
Table 11 SFRs bit description
REGISTER
FUNCTION
Interrupt Enable Register (IE)
EA
disable all interrupts (logic 0) or use individual interrupt enable bits (logic 1)
ES1
bit I2C-bus interrupt enable (logic 1)
ES2
byte I2C-bus interrupt enable (logic 1)
ET1
enable timer 1 overflow interrupt (logic 1)
EX1
enable external interrupt 1 (logic 1)
ET0
enable timer 0 overflow interrupt (logic 1)
EX0
enable external interrupt 0 (logic 1)
Power Control Register (PCON)
ARD
AUX-RAM disable bit. Disables the 512 bytes of internal AUX-RAM (logic 1);
all MOVX-instructions access the external data memory
GF1
general purpose flag 1
GF0
general purpose flag 0
Program Status Word (PSW)
CY
carry flag
AC
auxiliary carry flag
F0
flag 0
RS1,RS0
register bank select control bits
OV
overflow flag
P
parity flag
6-bit Pulse Width Modulator Control Registers (PWM0 to PWM7)
PWE
activate this PWM and take control of respective port pin (logic 1)
PV5 to PV0
binary value sets high time of PWM output
Serial Interface Slave Address Register (S1ADR); note 1
ADR6 to ADR0
I2C-bus slave address to which the device will respond
GC
enables response to the I2C-bus general call address
Serial Interface Control Register (S1CON); note 1
CR2 to CR0
ENSI
clock rate bits
I2C-bus interface enable
STA
start condition flag
STO
stop condition flag
SI
interrupt flag
AA
assert acknowledge flag
1997 Jul 07
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