83C751 Datasheet, PDF (19/24 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 2K/64 OTP/ROM, I2C, low pin count

Philips Semiconductors
80C51 8-bit microcontroller family
2K/64 OTP/ROM, I²C, low pin count
Product specification
83C751/87C751
EPROM PROGRAMMING AND VERIFICATION
T_amb = 21°C to +27°C, V_CC = 5V ±10%, V_SS = 0V
SYMBOL
PARAMETER
MIN
1/t_CLCL
t_AVGL1
Oscillator/clock frequency
Address setup to P0.1 (PROG–) low
1.2
10µs + 24t_CLCL
t_GHAX
Address hold after P0.1 (PROG–) high
48t_CLCL
t_DVGL
Data setup to P0.1 (PROG–) low
38t_CLCL
t_GHDX
Data hold after P0.1 (PROG–) high
36t_CLCL
t_SHGL
V_PP setup to P0.1 (PROG–) low
10
t_GHSL
V_PP hold after P0.1 (PROG–)
10
t_GLGH
P0.1 (PROG–) width
90
t_AVQV2
V_PP low (V_CC) to data valid
t_GHGL
P0.1 (PROG–) high to P0.1 (PROG–) low
10
t_MASEL
ASEL high time
13t_CLCL
t_HAHLD
Address hold time
2t_CLCL
t_HASET
Address setup to ASEL
13t_CLCL
t_ADSTA
Low address to valid data
NOTES:
1. Address should be valid at least 24t_CLCL before the rising edge of P0.2 (V_PP).
2. For a pure verify mode, i.e., no program mode in between, t_AVQV is 14t_CLCL maximum.
P0.2 (V_PP) 5V
12.75V
t_SHGL
25 PULSES
P0.1 (PGM)
P0.0 (ASEL)
t_MASEL
t_GLGH
98µs MIN
t_AVGL
t_GHGL
10µs MIN
PORT 3
PORT 1
t_HASET
HIGH ADDRESS
t_HAHLD
LOW ADDRESS
INVALID DATA
VERIFY MODE
t_ADSTA
VALID DATA
t_DVGL t_GHDX
DATA TO BE PROGRAMMED
PROGRAM MODE
Figure 7. Program/Verify Cycle
MAX
6
UNIT
MHz
µs
µs
110
µs
48t_CLCL
µs
48t_CLCL
5V
t_GHSL
t_AVQV
INVALID DATA
VALID DATA
VERIFY MODE
SU00303
Purchase of Philips I²C components conveys a license under the Philips’ I²C patent
to use the components in the I²C system provided the system conforms to the
I²C specifications defined by Philips. This specification can be ordered using the
code 9398 393 40011.
1998 May 01
19