83C751 Datasheet, PDF (18/24 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 2K/64 OTP/ROM, I2C, low pin count

Philips Semiconductors
80C51 8-bit microcontroller family
2K/64 OTP/ROM, I²C, low pin count
Product specification
83C751/87C751
Programming and Verifying Security Bits
Security bits are programmed employing the same techniques used
to program the USER EPROM and KEY arrays using serial data
streams and logic levels on port pins indicated in Table 6. When
programming either security bit, it is not necessary to provide
address or data information to the 87C751 on ports 1 and 3.
Verification occurs in a similar manner using the RESET serial
stream shown in Table 6. Port 3 is not required to be driven and the
results of the verify operation will appear on ports 1.6 and 1.7.
Ports 1.7 contains the security bit 1 data and is a logical one if
programmed and a logical zero if not programmed. Likewise, P1.6
contains the security bit 2 data and is a logical one if programmed
and a logical zero if not programmed.
Erasure Characteristics
Erasure of the EPROM begins to occur when the chip is exposed to
light with wavelengths shorter than approximately 4,000 angstroms.
Since sunlight and fluorescent lighting have wavelengths in this
range, exposure to these light sources over an extended time (about
1 week in sunlight, or 3 years in room level fluorescent lighting)
could cause inadvertent erasure. For this and secondary effects,
it is recommended that an opaque label be placed over the
window. For elevated temperature or environments where solvents
are being used, apply Kapton tape Flourless part number 2345–5 or
equivalent.
The recommended erasure procedure is exposure to ultraviolet light
(at 2537 angstroms) to an integrated dose of at least 15W-s/cm².
Exposing the EPROM to an ultraviolet lamp of 12,000µW/cm² rating
for 20 to 39 minutes, at a distance of about 1 inch, should be
sufficient.
Erasure leaves the array in an all 1s state.
Table 6. Implementing Program/Verify Modes
OPERATION
Program user EPROM
Verify user EPROM
Program key EPROM
Verify key EPROM
Program security bit 1
Program security bit 2
Verify security bits
NOTE:
* Pulsed from V_IH to V_IL and returned to V_IH.
SERIAL CODE
296H
296H
292H
292H
29AH
298H
29AH
P0.1 (PGM/)
–*
V_IH
–*
V_IH
–*
–*
V_IH
P0.2 (V_PP)
V_PP
V_IH
V_PP
V_IH
V_PP
V_PP
V_IH
A0–A10
ADDRESS STROBE
87C751
P3.0–P3.7
V_CC
+5V
P0.0/ASEL
V_SS
PROGRAMMING
PULSES
V_PP/V_IH VOLTAGE
SOURCE
CLK SOURCE
P0.1
P0.2
XTAL1
P1.0–P1.7
DATA BUS
RESET
CONTROL
LOGIC
RESET
Figure 5. Programming Configuration
SU00317
XTAL1
RESET
MIN 2 MACHINE
CYCLES
BIT 0 BIT 1
BIT 2
TEN BIT SERIAL CODE
BIT 3 BIT 4
BIT 5
BIT 6 BIT 7 BIT 8
BIT 9
P0.2 UNDEFINED
P0.1 UNDEFINED
1998 May 01
Figure 6. Entry into Program/Verify Modes
18
SU00302