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TDA8020HL Datasheet, PDF (16/24 Pages) NXP Semiconductors – Dual smart card interface
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Philips Semiconductors
Dual smart card interface
Product specification
TDA8020HL
SYMBOL
PARAMETER
CONDITIONS
MIN.
fmax
maximum frequency on
−
pins I/O1 and I/O2
Data lines (pins I/O1uC and I/O2uC); note 3
VOL
LOW-level output voltage
VOH
HIGH-level output voltage
VIL
VIH
IIL
ILIH
ti(r), ti(f)
to(r), to(f)
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input leakage
current
input transition times
output transition times
Rpu(int)
Timing
internal pull-up resistance
IOL = 1 mA
no DC load
IOH < −10 µA
VIL = 0
VIH = VDDI
0
0.9VDDI
0.75VDDI
−0.3
0.7VDDI
−
−
from VIL(max) to VIH(min)
−
CL < 30 pF; 10% to 90% from
−
0 to VDDI
between I/O1uC, I/O2uC and VDDI 15
tact
activation sequence duration
−
tde
deactivation sequence
−
duration
Protections and limitations
ICC(sd)
shutdown and limitation
−
current at VCC1 and VCC2
II/O(lim)
limitation current on
−15
pins I/O1 and I/O2
ICLK(lim) limitation current on
−70
pins CLK1 and CLK2
IRST(sd) shutdown and limitation
−20
current on pins RST1
and RST2
Tj(sd)
shutdown die temperature
−
Card presence inputs (pins PRES1 and PRES2)
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
ILIL
LOW-level input leakage
VI = 0
current
ILIH
HIGH-level input leakage
VI = VDD
current
−
0.7VDD
−
−
TYP.
−
−
−
−
−
−
−
−
−
−
22
−
−
−90
−
−
−
150
−
−
−
−
MAX.
500
0.4
VDDI + 0.2
VDDI + 0.2
0.25VDDI
VDDI + 0.3
600
10
1
0.1
30
135
110
−
+15
+70
+20
−
0.3VDD
−
±20
±20
UNIT
kHz
V
V
V
V
V
µA
µA
µs
µs
kΩ
µs
µs
mA
mA
mA
mA
°C
V
V
µA
µA
2001 Aug 15
16
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