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TDA8020HL Datasheet, PDF (12/24 Pages) NXP Semiconductors – Dual smart card interface
Philips Semiconductors
Dual smart card interface
Product specification
TDA8020HL
Protections
The current on pin CLK is limited to ±70 mA.
The current on pin RST is limited to ±20 mA; if the current
reaches this value with RST LOW, then an emergency
deactivation sequence is performed, IRQ is pulled LOW
and bit PROT is set in the status register.
The current on pins I/O is limited to +15 and −15 mA.
The current on VCC is limited to 90 mA; if ICC reaches this
value, then an emergency deactivation sequence is
performed, IRQ is pulled LOW and bit PROT is set in the
status register.
In the event of overcurrent on VCC, card take-off during a
session, overheating, or overcurrent on RST, then the
TDA8020HL performs an automatic emergency
deactivation sequence on the corresponding card, resets
bit START/STOP and pulls pin IRQ LOW.
In the event of overheating or supply drop-out, the
TDA8020HL performs an automatic emergency
deactivation sequence on both cards, resets both bits
START/STOP and pulls pin IRQ LOW.
Clock inputs and data inputs/outputs to the system
controller
CLKIN1 is the input clock for card 1, CLKIN2 for card 2.
They may be driven separately from the system controller,
or be tied together externally and driven with the same
signal.
An RC filter is needed on these lines in order to limit the
influence of possible fast transitions.
I/O1uC is the data signal to or from card 1, I/O2uC to or
from card 2. They can be driven separately from the
system controller, in which case both bits I/OEN may be
set to logic 1. They can also be driven by the same signal,
in which event they have to be tied together externally, but
each bit I/OEN has to be set or reset according to the
addressed card.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VDD
VDDI
Vn
In
Ptot
Tstg
Tj
Ves
PARAMETER
supply voltage on pins VDD and VDDA
supply voltage for interface signals
input voltage
on pins SAP, SAM, SBP, SBM and VUP
on all other pins
DC current
from or to pins SAP, SAM, SBP, SBM
and VUP
from or to all other pins
total power dissipation
storage temperature
junction temperature
electrostatic discharge voltage
on pins I/O1, VCC1, RST1, CLK1,
CGND1, PRES1, I/O2, VCC2, RST2,
CLK2, CGND2 and PRES2
on all other pins
CONDITIONS
Tamb = −20 to +85 °C
MIN.
−0.5
−0.5
−0.5
−0.5
−200
−5
−
−55
−
−6
−2
MAX.
+6.5
+6.5
UNIT
V
V
+7.5
V
VDD + 0.5 V
+200
mA
+5
mA
460
mW
+150
°C
125
°C
+6
kV
+2
kV
2001 Aug 15
12