MN101C115 Datasheet, PDF (52/170 Pages) Panasonic Semiconductor – Request for your special attention and precautions in using the technical information and semiconductors described in this book

Chapter 3 Port Functions
3-1 Overview
A total of 39 pins on the MN101C117, including those shared with special
function pins, are allocated for the 7 ports of P0 to P2, P6 to P8, and PA.
Each I/O port is assigned according to the special function register area in
memory. I/O ports are operated in byte or bit units in the same way as RAM.
For each I/O port, the PnOUT register (port n output
register) that sets the output value is assigned to memory
address X'3F1n', and the PnIN register (port n input
register) from which the input value is monitored is
assigned to memory address X'3F2n'.
• This I/O control is valid even when special functions are selected for the dual function pins.
•Table 3-1-1 Status When Port Is Reset (single-chip mode)
Port
Port 0
Port 1
Port 2
Port 6
Port 7
Port 8
Port A
I/O Mode
Input mode
Input mode
Input mode
Input mode
Input mode
Input mode
Input mode
Pull-up/Pull-down Resistor I/O Port or Special Function
No pull-up resistor
I/O port
No pull-up resistor
I/O port
No pull-up resistor
No pull-up resistor
I/O port
I/O port
No pull-up/pull-down resistors
No pull-up/pull-down resistors
No pull-up/pull-down resistors
I/O port
I/O port
I/O port
s Port 0 (P0)
4-bit CMOS tri-state I/O port.
Table 3-1-2 Port 0 Functions
Pin Name Type
P00 to P02 I/O
P06
Dual Function
SBO0(TXD),
SBI0(RXD),
SBT0
BUZZER
Description
Each bit can be set individually as either an input or
output by the P0DIR register. A pull-up resistor for each
bit can be selected individually by the P0PLU register.
At reset, the input mode is selected and pull-up resistors
are disabled (high impedance output).
38 _Overview