MN101C115 Datasheet, PDF (103/170 Pages) Panasonic Semiconductor – Request for your special attention and precautions in using the technical information and semiconductors described in this book

Chapter 4 Timer Functions
4-9-4 Timer Control Registers
(1) Watchdog timer control register (WDCTR)
7
6
5
4
3
2
WDCTR
–
–
–
–
–
–
1
0
– _WDEN
(at reset: -------0)
WDEN
0
1
Watchdog timer enable
Clear watchdog timer/disable opera ion
Enable WDT timer
Figure 4-9-17 Watchdog Timer Control Register (WDCTR: X'03F02', R/W)
(2) Oscillation stabilization wait control register (DLYCTR)
7
6
5
4
3
2
1
0
DLYCTR BUZOE BUZCK1 BUZCK0 –
–
– DLYS1 DLYS0
(at reset: 0XX---00)
DLYS1 DLYS0
Oscillation stabilization
wait period setting
0 1/2¹⁴ of the system clock (fs)
0
1 1/2¹⁰ of the system clock (fs)
1
0 1/2⁶ of the system clock (fs)
1
1 Disable use
∗After reset is released, the oscillation
stabilization wait period is fixed at 1/2¹⁵.
BUZCK1 BUZCK0
Buzzer output
frequency selection
0 1/2¹² of the system clock (fs)
0
1 1/2¹¹ of the system clock (fs)
0 1/2¹⁰ of the system clock (fs)
1
1 1/2⁹ of the system clock (fs)
BUZOE P06 output selection
0 P06 port output
1 P06 buzzer output
Figure 4-9-18 Oscillation Stabilization Wait Counter Control Register
(DLYCTR: X'03F03', R/W)
Timer Function Control Registers 89