MN101C115 Datasheet, PDF (29/170 Pages) Panasonic Semiconductor – Request for your special attention and precautions in using the technical information and semiconductors described in this book

Chapter 1 Overview
Parameter
Symbol
Conditions
External clock input 1 OSC1 (OSC2 is unconnected)
18 Clock frequency
f
OSC
19 High level pulse width^∗ twh 1
20 Low level pulse width^∗ twl 1
∗1 _{Fig. 1-5-3}
21 Rise time
22 Fall time
twr 1
twf 1
Fig. 1-5-3
External clock input 2 XI (XO is unconnected)*2
23 Clock frequency
fx
24 High level pulse width^∗ twh 2
25 Low level pulse width^∗ twl 2
∗1 _{Fig. 1-5-4}
26 Rise time
27 Fall time
twr 2
twf 2
Fig. 1-5-4
∗1 _{Set the clock duty ratio to 45 to 55%.}
*2 Applicable only for 48-pin QFH package
Rating
Unit
MIN TYP MAX
1.0
20.0 MHz
20.0
30.0
ns
20.0
30.0
5.0
ns
5.0
32.768
3.5
3.5
100 kHz
µs
20
ns
20
Electrical Characteristics 15