AMIS-30421 Datasheet, PDF (9/41 Pages) ON Semiconductor – Micro-Stepping Stepper Motor Bridge Controller

AMIS−30421
Table 5. AC PARAMETER The AC parameters are given for V_BB and temperature in their operating ranges unless otherwise
specified.
Symbol Pin(s)
Parameter
Remark/Test Conditions
Min
Typ
Max
DIGITAL INPUTS
t_{NXT_HI}
NXT Minimum, high pulse width
625
t_{NXT_LO}
NXT Minimum, low pulse width
625
t_{DIR_SET}
NXT set up time, following change of
DIR or <DIRCTRL>
1
t_{DIR_HOLD}
t_{SLP_SET}
NXT hold time, before change of DIR
or <DIRCTRL>
1
<SLP> set up time
See Figure 6
300
t_{SLP_HOLD}
<SLP> hold time
1
t_{MOTEN_SET}
<MOTEN> set up time
1
t_{MOTEN_HO}
<MOTEN> hold time
1
LD
t_MSP
<MSP[7:0]> update delay
1
CLEAR FUNCTION
t_{CLR_SET}
t_CLR
CLR
DIGITAL OUTPUTS
Clear set up time
Clear duration time
See Figure 7
40
See Figure 7
20
90
t_H2L
DO, WDb, Output fall−time from V_OH to V_OL
ERRb
Output type 2, capacitive load
400 pF and pull−up resistor of
1.5 kW
50
WATCHDOG
t_WDPR
Prohibited watchdog acknowledge
time
2.5
t_WDTO
Watchdog time out interval
t_{WDTO_acc}
Watchdog time out accuracy
t_WDRD
Watchdog Reset Delay
SERIAL PERIPHERAL INTERFACE (SPI)
32
512
−20
+20
500
t_CLK
SPI Clock period
t_{CLK_HIGH}
CLK SPI Clock high time
t_{CLK_LOW}
SPI Clock low time
t_{DI_SET}
t_{DI_HOLD}
SPI Data Input set up time
DI
SPI Data Input hold time
t_{CS_HIGH}
SPI Chip Select high time
t_{CS_SET}
CSb SPI Chip Select set up time
t_{CS_HOLD}
SPI Chip Select hold time
SPEED AND LOAD ANGLE OUTPUT
1
100
100
50
See Figure 8
50
2.5
100
100
t_{SLA_DELAY} SLA SLA output update delay
Not−transparent Mode
See Figure 20
60
t_MinSLA
Minimum zero crossing time
Selectable through SPI
40
360
t_{MinSLA_Acc}
Minimum zero crossing accuracy
−20
+20
CHARGE PUMP
f_CP
t_CPU
CPN CPP Charge pump frequency
MOTxx Start−up time of charge pump
160
200
250
Spec external components in
Table 4
250
Unit
ns
ns
ms
ms
ms
ms
ms
ms
ms
ms
ms
ns
ms
ms
%
ns
ms
ns
ns
ns
ns
ms
ns
ns
ms
ms
%
kHz
ms
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