AMIS-30421 Datasheet, PDF (22/41 Pages) ON Semiconductor – Micro-Stepping Stepper Motor Bridge Controller

AMIS−30421
Figure 21. BEMF sampling without (left) and with (right) zero crossing stretching
Sleep Mode
AMIS−30421 can be placed in Sleep Mode by means of
SPI bit <SLP>. This mode allows reduction of
current−consumption when the motor is not in operation.
The effect of sleep mode is as follows:
• The drivers are put in HiZ
• All analog circuits are disabled and in low−power mode
• All SPI registers maintain their logic content
• SPI communication is still possible (slightly current
increase during SPI communication).
• Status Registers can not be cleared by reading out
• NXT and DIR inputs are forbidden
• Oscillator and digital clocks are silent
• Motor driver can not be cleared by means of the
CLR−pin
The voltage regulator remains active but with reduced
current−output capability (I_{LOAD_PD}).
When Sleep Mode is left a start−up time is needed for the
charge pump to stabilize. After this time (t_{SLP_SET}) NXT
commands can be issued (see also Figure 6).
Enabling the motor when the charge pump is not stable can
result in overcurrent errors (see section Over−Current
Detection). Because of this it’s advised to keep the motor
disabled during the stabilization time (t_{SLP_SET}).
The IO−pins of AMIS−30421 have internal pull−down or
pull−up resistors (see Figure 3). Keep this in mind when
entering Sleep Mode.
In Sleep Mode V_DD can drop to 2.1 V minimum (see
V_{DD_SLEEP} in Table 4). Keep in mind that in this case it’s not
allowed to pull the input pins above 2.1 V!
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