AMIS-30421 Datasheet, PDF (28/41 Pages) ON Semiconductor – Micro-Stepping Stepper Motor Bridge Controller

AMIS−30421
wants to initiate an SPI transfer to read the Status Registers.
Because the internal system clock updates the Status
CS
New data is written into Register
with Addr4 at rising edge of CSb
DI
Write Data
to Addr4
New Data for Addr4
Registers only when CSb line is high, the first read out byte
might represent old status information (Figure 30).
Read Data
from Addr4
Command or
Dummy
DO
Old Data or
Not Valid
Old Data
from Addr4
Data from previous command
or not valid after POR
Old Data
From Addr4
New Data
From Addr4
Figure 29. WRITE Operation Followed by a READ operation to verify
CS
DI
Read from 0x04
Read from 0x05
Read from 0x06
Command or
Dummy
DO
Old Data or
Not Valid
Data from 0x04
Data from 0x05
Data from 0x06
Data from previous command
or not valid after POR
Figure 30. 3 READ Operations in a Row
Bad Examples of READ and WRITE Operations
The following example demonstrates a bad WRITE
operation. After a WRITE operation a read operation is done
before CSb is made high. The data will not be written in the
Register. Figure 32 demonstrates how it should be done (see
also Figure 29).
The second example (Figure 33) demonstrates an
incorrect way of reading errors. After a WRITE operation
the ERRb−pin toggles indication an error. Without toggling
CSb the 3 Status Registers are read out to determine the
error. Because CSb was not high after the error was detected,
the Status Registers will not be updated and the error can not
be determined. A second problem with Figure 33 is that the
data written to Addr9 will not be stored because CSb was not
toggled after the write operation.
Figure 34 gives the correct way of reading out errors.
When the error is detected (toggling of ERRb−pin), CSb is
made high to make sure the Status Registers are updated.
Then the Status Registers are read out. Notice that ERRb
toggles after Status Register 1 is read out (Addr 0x05). This
indicates that the error was an overcurrent in the X−coil, a
charge pump failure or an open X−coil. Also notice that
because CSb is made high after the write operation, the write
operation will now be done correctly.
CS
New data is NOT written into Register because
WRITE operation did not ended with CSb going high!
DI
Write Data
to Addr8
New Data for Addr8
Read Data
from Addr8
Command or
Dummy
Read Data
from Addr8
Command or
Dummy
DO
Old Data or
Not Valid
Old Data
from Addr8
Old Data
From Addr8
Old Data
from Addr8
Old Data
From Addr8
Old Data
from Addr8
Data from previous command
or not valid after POR
Data was not written in Addr8 because WRITE
operation did not ended with CSb going high!
Figure 31. Bad Example of Write Operation
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