AND8090 Datasheet, PDF (5/20 Pages) ON Semiconductor – AC Characteristics of ECL Devices

AND8090/D
SIGNAL LEVELS
AC HIGH and LOW Levels − The HIGH level referred
to in this application note corresponds to the IEEE “topline,”
and the LOW level corresponds to the IEEE “baseline” as
shown in Figure 5. The 50% point lies halfway between the
HIGH and LOW levels. Refer to IEEE Standard 194−1977
for further voltage level information.
V_IH/V_OH
HIGH
(topline)
50%
V_IL/V_OL
LOW
(baseline)
Figure 5. HIGH and LOW Waveform Definition
Input Levels − Operational differential input levels are
specified by V_PP and the V_IHCMR range as described in the
“Differential Characteristics” section. Operational
single−ended input levels are specified by V_IL and V_IH as
described in the “Single−Ended Characteristics” section.
Output Levels − Output signals may be differential or
single−ended. AC characteristics for ON Semiconductor
devices with ECL outputs are typically measured for an
output termination of 50 W to V_TT (the termination voltage
equal to V_CC − 2.0 V). HIGH and LOW output levels range
between the boundary and threshold values for the
respective HIGH and LOW input levels specified on data
sheets. Output logic levels are shown in Figure 6.
V_OHmax
HIGH
V_OHmin
Boundary
Threshold
V_OLmax
LOW
V_OLmin
Threshold
Boundary
Figure 6. Output Logic Levels
Oscilloscope Averaging − Digital sampling oscilloscopes
use an algorithm to determine the average level over a pulse
width to establish the HIGH and LOW levels. An example is
shown in Figure 7. The horizontal cursors at the HIGH and
LOW levels indicate the determined average levels.
HIGH
LOW
Figure 7. HIGH and LOW Waveform Levels
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