MT9P001 Datasheet, PDF (22/48 Pages) ON Semiconductor – CMOS Digital Image Sensor

MT9P001: 1/2.5-Inch 5Mp Digital Image Sensor
Features
2 MHz < ^fEXTCLK / N < 13.5 MHz
180 MHz < (^fEXTCLK × M) / N < 360 MHz
It is desirable to keep (^fEXTCLK / n) as large as possible within the limits. Also, "m"
must be between 16 and 255, inclusive.
3. Wait 1ms to ensure that the VCO has locked.
4. Set Use_PLL (R0x10[1] = 1) to switch from EXTCLK to the PLL-generated clock.
Standby and Chip Enable
The MT9P001 can be put in a low-power Standby state by either method below:
1. Hard Standby: By pulling STANDBY_BAR LOW,
or
2. Soft Standby: By clearing the Chip_Enable register field (R0x07[1] = 0).
When the sensor is put in standby, all internal clocks are gated, and analog circuitry is
put in a state that it draws minimal power. The two-wire serial interface remains mini-
mally active so that the Chip_Enable bit can subsequently be cleared. READs cannot be
performed and only the Chip_Enable and Invert_Standby registers are writable.
If the sensor was in continuous mode when put in standby, it resumes from where it was
when standby was deactivated. Naturally, this frame and the next frame are corrupted,
though the sensor itself does not realize this. As this could affect automatic black level
calibration, it is recommended that either the chip be paused (by setting Restart_Pause)
before being put in standby mode, or it be restarted (setting Restart) upon resumption of
operation.
For maximum power savings in standby mode, EXTCLK should not be toggling.
When standby mode is entered, either by clearing Chip_Enable or by asserting STAND-
BY_BAR, the PLL is disabled automatically or powered down. It must be manually re-
enabled when leaving standby as needed.
Full-Array Readout
The entire array, including dark pixels, can be read out without digital processing or
automatic black level adjustments. This can be accomplished as follows:
1. Set Row_Start and Column_Start to 0.
2. Set Row_Size to 2003.
3. Set Column_Size to 2751.
4. Set Manual_BLC to 1.
5. Set Row_BLC to 0.
6. Set Row_Black_Default_Offset to 0.
7. Set Show_Dark_Rows and Show_Dark_Columns to 0.
If automatic analog (coarse) BLC is desired, but no digital processing, modify the above
settings as follows:
1. Set Row_Start to 12.
2. Set Row_Size to 1993.
3. Set Manual_BLC to 0.
MT9P001_DS Rev. L 4/15 EN
22
©Semiconductor Components Industries, LLC,2015.