TDA8295_09 Datasheet, PDF (9/83 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio

NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
Table 4. Pin description …continued
Symbol
Pin Type^[1][2] Description
Boundary scan
TMS
24 I
Test mode select provides the logic levels needed to change the TAP controller from
state to state during the boundary scan test.
TRST_N
30 I
Test reset is used to reset the TAP controller (active LOW). Grounding is mandatory in
Functional mode.
TCK
27 I
Test clock is used to drive the TAP controller.
TDI
23 I
Test data input is the serial data input for the test data instruction.
TDO
22 O
Test data output is the serial test data output pin. The data is provided on the falling
edge of TCK.
ADC
IF_POS
1 AI
IF positive analog input for internal ADC
IF_NEG
2 AI
IF negative analog input for internal ADC
DAC
V_IOUTP
14 AO
positive analog current output of the video output
V_IOUTN
13 AO
negative analog current output of the video output
S_IOUTP
17 AO
positive analog current output of the SSIF/mono sound output
S_IOUTN
16 AO
negative analog current output of the SSIF/mono sound output
RSET
11 I
External bias setting of the DACs. An external resistor (1 kΩ typical) has to be
connected between RSET and the analog ground of the board. This resistor generates
the current into the DACs and also defines the full scale output current. The total
parasitic capacitance seen externally from the RSET pin has to be lower than 20 pF.
Supplies and grounds
V_{DDA(DAC1)(3V3)} 15
V_{DDA(DAC2)(3V3)} 18
V_SSA(DAC)
12
V_{DDA(ADC)(3V3)} 3
V_{DDD(ADC)(3V3)} 39
V_SSA(ADC)
40
V_DDD1(1V2)
4
V_SSD1
5
V_{DDA(PLL)(1V2)} 7
V_SSA(PLL)
10
V_DDD2(1V2)
25
V_SSD2
26
V_DDDR(3V3)
34
V_SSDR
35
Other pins
PS
PS
GND
PS
PS
GND
PS
GND
PS
GND
PS
GND
PS
GND
DAC1 (video DAC) and DAC reference module analog supply voltage (3.3 V typical)
DAC2 (sound DAC) analog supply voltage (3.3 V typical)
DAC reference module analog ground supply voltage (0 V typical)
IF ADC analog supply voltage (3.3 V typical)
IF ADC digital supply voltage (3.3 V typical)
ADC analog ground supply voltage (0 V typical)
ADC, PLL and DACs digital supply voltage (1.2 V typical)
ADC, PLL and DACs digital ground supply voltage (0 V typical)
crystal oscillator and clock PLL analog supply voltage (1.2 V typical)
crystal oscillator and clock PLL analog ground supply voltage (0 V typical)
core digital supply voltage (1.2 V typical)
core digital ground supply voltage (0 V typical)
ring digital supply voltage (3.3 V typical)
ring digital ground supply voltage (0 V typical)
i.c.
36 I
internally connected; connect to ground
i.c.
38 I
internally connected; connect to ground
i.c.
6I
internally connected; connect to ground
[1] All digital inputs are 5 V tolerant (except pin XIN).
[2] The pin types are defined in Table 5.
TDA8295_C2_2
Product data sheet
Rev. 02 — 27 November 2009
© NXP B.V. 2009. All rights reserved.
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