TDA8295_09 Datasheet, PDF (74/83 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio

NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
Table 73. Crystal parameters together with external components …continued
Fundamental
oscillation
frequency
15 MHz to
20 MHz
Crystal load
capacitance
C_L(xtal) (pF)
10
Crystal series External load capacitors
resistance R_{s(xtal) C1 (pF)}
(Ω)
C2 (pF)
< 80
18
18
Bit HF = 1
10 MHz to
10
< 200
18
18
15 MHz
20
< 120
39
39
15 MHz to
10
< 180
18
18
20 MHz
20
< 100
39
39
20 MHz to
10
< 160
18
18
25 MHz
20
< 80
39
39
25 MHz to
10
< 130
18
18
30 MHz
20
< 60
39
39
30 MHz to
10
< 120
18
18
35 MHz
35 MHz to
10
< 100
18
18
40 MHz
40 MHz to
10
< 80
18
18
45 MHz
45 MHz to
10
< 60
18
18
50 MHz
14. Test information
14.1 Boundary scan interface (“IEEE Std. 1149.1”)
The TDA8295 implements a boundary scan architecture to allow access to, and control of,
board test support features within integrated circuits through a TAP. The TAP controller is
a synchronous state machine that controls the sequence of operations on the TAP
circuitry when the TMS signal changes. All state transitions occur on the basis of the TMS
value on the rising edge of TCK. The instruction register is a shift register based design. It
decodes the test to be performed and/or the test data register to be accessed. The
instructions are shifted into the register through the TDI and are latched as the current
instruction at the completion of the shifting process. The TDA8295 boundary scan
architecture includes: a TAP controller, a scannable instruction register and three
scannable test data registers: a boundary scan register, a device ID register, and a bypass
register.
The supported instructions are: EXTEST, IDCODE, SAMPLE, INTEST, CLAMP, HIGHZ
and BYPASS.
The boundary scan register is composed of 16 cells (see Table 74). Each cell is
associated either to an input pad, an output pad, a bidirectional pad or to the bidirectional
or 3-state command itself. All cells are of ‘observe and control’ type.
The device ID register is a 32-bit identification register that is included in the scan register
itself and contains the ID number. It is a fixed value that identifies the chip.
TDA8295_C2_2
Product data sheet
Rev. 02 — 27 November 2009
© NXP B.V. 2009. All rights reserved.
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