TDA8295_09 Datasheet, PDF (43/83 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio

NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
9.3.14 Debug register for ADC and DAC test
Table 47. ANALOG_DEBUG register (address 2Ah) bit description
Legend: * = default value.
Bit Symbol Access Value Description
7 to 2 -
R/W -
not used
1
ADC_TEST R/W
If ADC_TEST is HIGH, the ADC input signal is interpolated
to 108 MHz and fed to video and sound DAC output; the
main circuitry is bypassed. This feature is intended mainly
for debugging purposes and performance judgment.
0*
Normal mode
1
ADC Test mode
0
DAC_TEST R/W
DAC Test mode; in this test mode an internally generated
sine wave is given out to video and sound DAC. The
amplitude at DAC output is −1.7 dBFS. The frequency can
be set by DTO_PC. Please use the following formula:
f
=
D_-----T_---O_----__----P_---C_---
2²⁴
×
13.5
MHz
. Due to
the
sampling theorem
only frequencies up to 6.75 MHz can be generated. This
feature is intended mainly for debugging purposes and
performance judgment.
0*
Normal mode
1
DAC Test mode
X
don’t care if ADC_TEST = 1
9.3.15 Chip identification and Standby mode
Table 48. IDENTITY register (address 2Fh) bit description
Bit Symbol
Access Value
Description
7 to 0 IDENTITY[7:0] R
1000 1010 chip identification, value corresponds to TDA8295
Table 49. CLB_STDBY register (address 30h) bit description
Legend: * = default value.
Bit Symbol Access Value Description
7 to 2 -
R/W -
not used
1
STDBY R/W
When STDBY is set to logic 1, the chip enters in Standby
mode, and its power consumption is reduced. The IF AGC pin
is set to high-ohmic. The default value is logic 0, which means
that the chip is active.
0*
Normal mode
1
Standby mode
0
CLB R/W
This signal clears the TDA8295 through the I²C-bus interface
(software reset). To activate the reset, just write CLB = 0. This
software reset will not affect the content of the registers.
0
activate soft reset
1*
normal operation
TDA8295_C2_2
Product data sheet
Rev. 02 — 27 November 2009
© NXP B.V. 2009. All rights reserved.
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