TDA8295_09 Datasheet, PDF (8/83 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio

NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
Table 3. Pin allocation table …continued
Pin
Symbol
Pin
Symbol
31
GPIO2/SDA_O
32
GPIO1/SCL_O
33
GPIO0/VSYNC
35
V_SSDR
37
IF_AGC
34
V_DDDR(3V3)
36
i.c.
38
i.c.
39
V_{DDD(ADC)(3V3)}
40
V_SSA(ADC)
7.2 Pin description
Table 4. Pin description
Symbol
Pin Type^[1][2] Description
Reset
RST_N
21 I
The RST_N input is asynchronous and active LOW, and clears the TDA8295. When
RST_N goes LOW, the circuit immediately enters its Reset mode and normal operation
will resume four XIN signal falling edges later after RST_N returns HIGH. Internal
register contents are all initialized to their default values. The minimum width of RST_N
at LOW level is four XIN clock periods.
Reference
XIN
8I
Crystal oscillator input pin. In Slave mode (typically), the XIN input simply receives a
16 MHz clock signal from an external device (typically from the TDA8275A or
TDA1827x). In Oscillator mode, a fundamental 16 MHz (typically) crystal is connected
between pin XIN and pin XOUT.
XOUT
9O
Crystal oscillator output pin. In Slave mode, the XOUT output is not connected. In
Oscillator mode a fundamental 16 MHz (typically) crystal is connected between pin XIN
and pin XOUT.
I²C-bus
SDA
29 I/O, OD I²C-bus bidirectional serial data. SDA is an open-drain output and therefore requires an
external pull-up resistor (typically 4.7 kΩ).
SCL
28 I
I²C-bus clock input. SCL is nominally a square wave with a maximum frequency of
400 kHz. It is generated by the system I²C-bus master.
SADDR0
SADDR1
19 I
20 I
These two bits allow to select four possible I²C-bus addresses, and therefore permits to
use several TDA8295 in the same application and/or to avoid conflict with other ICs.
The complete I²C-bus address is: 1, 0, 0, SADDR1, 0, 1, SADDR0 (see also
Section 9.1).
I²C-bus feed-through switch or GPIO
GPIO2/SDA_O 31
I/O, OD
SDA_O is equivalent to SDA but can be 3-stated by I²C-bus programming. It is the
output of a switch controlled by I2CSW_EN parameter. SDA_O is an open-drain output
and therefore requires an external pull-up resistor (see Section 9.3.20).
GPIO1/SCL_O 32
I/O, OD
SCL_O is equivalent to SCL input but can be 3-stated by I²C-bus programming. SCL_O
is an open-drain output and therefore requires an external pull-up resistor
(see Section 9.3.20). For proper functioning of the I²C-bus feed-through, a capacitor
C = 33 pF to GND must be added (see Section 13.6).
V-sync or GPIO
GPIO0/VSYNC 33 I/O, OD vertical synchronization pulse needed for the NXP Silicon Tuner (see Section 9.3.20)
Tuner IF AGC
IF_AGC
37 I/O, OD, T tuner IF AGC output
TDA8295_C2_2
Product data sheet
Rev. 02 — 27 November 2009
© NXP B.V. 2009. All rights reserved.
8 of 83