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TDA8295_09 Datasheet, PDF (72/83 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio
NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
13.5 Reset operation
13.5.1 Hardware reset
RST_N
minimum width at LOW is 4 × TXIN
XIN
TXIN
the TDA8295 enters
immediately in its reset mode
Fig 16. Hardware reset operation
TDA8295 normal operation
starts after 4 falling edges of XIN
001aah362
After a hardware reset, the registers are set to default (power-on reset values) according
to Table 10. M/N standard is the default standard.
CS[2:0] has to be reprogrammed to a value equal or higher than 1.00 (corresponding to
CS[2:0] = 100 or 101 or 110), because the default value is not allowed (full performance is
not guarantied with the default value).
13.5.2 Software reset
A software reset can be done each time something has been programmed. The software
reset does not affect the content of the registers but clears the flip-flops in the design. For
the activation of the software reset see Table 49 bit CLB.
13.6 Application hints
• In case GPIO1 and GPIO2 are configured as I2C-bus feed-through, a capacitor
C = 33 pF to GND must be added at pin 32 (GPIO1/SCL_O). This ensures a reliable
behavior in Read mode.
• The detailed application diagram (see Figure 15) shows the video DAC connection
driving a 75 Ω DC load and the sound DAC driving > 1 kΩ AC/DC load. Power-save
mode: In order to reduce power consumption, the video DAC can be run with half
current and the sound DAC with a quarter current by changing RSET (R12 in
Figure 15) to 2 kΩ. This is possible, if the audio/video processor is rather high-ohmic
(> 1 kΩ). The following components in Figure 15 have to be replaced then:
R13 = 75 Ω; R15 and R16 = 150 Ω; C5 = 220 pF; C6 = 120 pF. A performance
degradation is not expected in the Power-save mode.
The TDA8295 has been designed in such a way, that a simple upgrade of the
predecessor TDA8290 is possible:
1. Change the 1.8 V power supply to 1.2 V. This can be done easily with a variable
voltage regulator, where the sense pin is grounded. This delivers the band gap
voltage of 1.25 V to the output. Or take a fixed regulator.
2. The RSET resistor (R12 in Figure 15) has to be decreased by 20 % in order to make
the DAC output swing higher (1.5 V instead of 1.25 V).
TDA8295_C2_2
Product data sheet
Rev. 02 — 27 November 2009
© NXP B.V. 2009. All rights reserved.
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