NT3H2111 Datasheet, PDF (61/77 Pages) NXP Semiconductors – Designed to be the perfect enabler for NFC in home-automation

NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I²C interface
11.3 Pass-through mode
PTHRU_ON_OFF = 1b (see Table 14) enables and indicates pass-through mode.
Password protection for pass-through mode may be enabled by enabling password
authentication and setting SRAM_PROT bit to 1b.
To handle large amount of data transfer from one interface to the other, NTAG I²C plus
offers the pass-through mode where data is transferred via a 64 byte SRAM. This buffer
offers fast write access and unlimited write endurance as well as an easy handshake
mechanism between the two interfaces.
This buffer is mapped directly at the end of the Sector 0 of NTAG I²C plus.
In both directions, the principle of access to the SRAM buffer via the NFC and I²C
interface is exactly the same (see Section 11.3.2 and Section 11.3.3).
The data flow direction must be set with the TRANSFER_DIR bit (see Table 14) within the
current communication session using the session registers (in this case, it can only be set
via the I²C interfaces) or for the configuration bits after POR (in this case both NFC and
I²C interface can set it). This pass-through direction settings avoids locking the memory
access during the data transfer from one interface to the SRAM buffer.
The pass-through mode can only be enabled via I²C interface when both interfaces are
powered. The PTHRU_ON_OFF bit, located in the session registers NC_REG (see
Section 8.3.12), needs to be set to 1b. In case one interface powers off, the pass-through
mode is disabled automatically.
NTAG I²C plus introduces in addition to the FAST_READ command as FAST_WRITE
command. With this new command in ACTIVE state whole SRAM can be written at once,
which improves the total pass-through performance significantly.
For more information read related application note Ref. 8.
11.3.1 SRAM buffer mapping
In pass-through mode, the SRAM is mirrored to pages F0h to FFh Sector 0 of NTAG I²C
plus.
The last page/block of the SRAM (page FFh) is used as the terminator page. Once the
terminator page/block in the respective interfaces is read/written, the control would be
transferred to other interface (NFC/I²C) - see Section 11.3.2 and Section 11.3.3 for more
details.
Accordingly, the application can align on the reader and host side to transfer 16/32/48/64
bytes of data in one pass-through step by only using the last blocks/page of the SRAM
buffer.
For best performance in addition to the FAST_READ, the FAST_WRITE command should
be used.
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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