NT3H2111 Datasheet, PDF (11/77 Pages) NXP Semiconductors – Designed to be the perfect enabler for NFC in home-automation

NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I²C interface
The NTAG I²C plus can only exit HALT state upon execution of the WUPA command. Any
other data received when the device is in this state is interpreted as an error, and NTAG
I²C plus state remains unchanged.
8.3 Memory organization
The memory map is detailed in Table 4 (1k memory) and Table 5 (2k memory) from the
NFC interface and in Table 6 (1k memory) and Table 7 (2k memory) from the I²C
interface. The SRAM memory is not accessible from the NFC interface, because in the
default settings of the NTAG I²C plus the pass-through mode is disabled. Please refer to
Section 11 for examples of memory map from the NFC interface with SRAM mapping.
The structure of manufacturing data, static and dynamic lock bytes, capability container
and user memory pages are compatible with other NTAG products.
Any memory access which starts at a valid address and extends into an invalid access
region will return 00h value in the invalid region.
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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