NT3H2111 Datasheet, PDF (46/77 Pages) NXP Semiconductors – Designed to be the perfect enabler for NFC in home-automation

NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I²C interface
All timing can be measured according to the ISO/IEC 14443-3 frame specification as
shown for the Frame Delay Time in Figure 20. For more details refer to Ref. 2.
last data bit transmitted by the NFC device
FDT = (n* 128 + 84)/fc
first modulation of the NFC TAG
128/fc 256/fc
logic „1“ end of communication (E)
FDT = (n* 128 + 20)/fc
128/fc
start of
communication (S)
128/fc
logic „0“
256/fc
end of communication (E)
128/fc
start of
communication (S)
aaa-006986
Fig 20. Frame Delay Time (from NFC device to NFC tag), T_ACK and T_NAK
Remark: Due to the coding of commands, the measured timings usually excludes (a part
of) the end of communication. Consider this factor when comparing the specified with the
measured times.
10.3 NTAG ACK and NAK
NTAG I²C plus uses a 4-bit ACK / NAK as shown in Table 17.
Table 17. ACK and NAK values
Code (4 bit)
ACK/NAK
Ah
Acknowledge (ACK)
0h
NAK for invalid argument (i.e. invalid page address or wrong password)
1h
NAK for parity or CRC error
3h
NAK for Arbiter locked to I²C
4h
Number of negative PWD_AUTH command limit reached
7h
NAK for EEPROM write error
10.4 ATQA and SAK responses
NTAG I²C plus replies to a REQA or WUPA command with the ATQA value shown in
Table 18. It replies to a Select CL2 command with the SAK value shown in Table 19. The
2-byte ATQA value is transmitted with the least significant byte first (44h).
Table 18. ATQA response of the NTAG I²C plus
Bit number
Sales type Hex value 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
NTAG I²C plus 00 44h
0000000001000100
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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