NT3H2111 Datasheet, PDF (44/77 Pages) NXP Semiconductors – Designed to be the perfect enabler for NFC in home-automation

NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I²C interface
For the READ register operation, following a Start condition the bus master/host sends the
NTAG I²C plus slave address code (SA - 7 bits) with the Read/Write bit (RW) reset to 0.
The NTAG I²C plus acknowledges this (A), and waits for one address byte (MEMA) which
corresponds to the address of the block of memory with the session register bytes (FEh).
The NTAG I²C plus responds to the address byte with an acknowledge (A). Then the bus
master/host issues a register address (REGA), which corresponds to the address of the
targeted byte inside the block FEh (00h, 01h...to 07h) and then waits for the Stop
condition.
Then the bus master/host again issues a start condition followed by the NTAG I²C plus
slave address with the Read/Write bit set to 1b. The NTAG I²C plus acknowledges this
(A), and sends the selected byte of session register data (REGDAT) within the block FEh.
The bus master/host will acknowledge it and issue a Stop condition.
For the WRITE register operation, following a Start condition, the bus master/host sends
the NTAG I²C plus slave address code (SA - 7 bits) with the Read/Write bit (RW) reset to
0. The NTAG I²C plus acknowledges this (A), and waits for one address byte (MEMA),
which corresponds to the address of the block of memory within the session register bytes
(FEh). After the NTAG I²C plus acknowledge (A), the bus master/host issues a register
address (REGA), which corresponds to the address of the targeted byte inside the block
FEh (00h, 01h...to 07h). After acknowledgement (A) by NTAG I²C plus, the bus
master/host issues a MASK byte that defines exactly which bits shall be modified by a 1b
bit value at the corresponding bit position. Following the NTAG I²C plus acknowledge (A),
the new register data (one byte - REGDAT) to be written is transmitted by the bus
master/host. The NTAG I²C plus acknowledges it (A), and the bus master/host issues a
stop condition.
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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