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NT3H2111 Datasheet, PDF (24/77 Pages) NXP Semiconductors – Designed to be the perfect enabler for NFC in home-automation
NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I2C interface
Table 10. Password and Access Configuration bytes
Bit Field
Access Access Default
via NFC via I²C values
Description
Authentication Pointer (AUTH0)
7-0 AUTH0
R&W R&W FFh
Page address of Sector 0 from which onwards the password
authentication is required to access the user memory from NFC
perspective, dependent on NFC_PROT bit.
If AUTH0 is set to a page address greater than EBh, the
password protection is effectively disabled. Password protected
area starts from page AUTH0 and ends at page EBh.
Password protection is excluded for Dynamic Lock Bits, session
registers and mirrored SRAM pages.
Note: From I²C interface, you have access to all configuration
pages until REG_LOCK_I2C bit is set to 1b.
Access Conditions (ACCESS)
7 NFC_PROT
R&W R&W 0b
Memory protection bit:
0b: write access to protected area is protected by the password
1b: read and write access to protected area is protected by the
password
6 RFU
R
R
0b
RFU - keep at 0b
5 NFC_DIS_SEC1 R&W R&W 0b
NFC access protection to Sector 1
0b: Sector 1 is accessible in 2k version
1b: Sector 1 in inaccessible and returns NAK0
4-3 RFU
R
R
00b
RFU - keep at 00b
2-0 AUTHLIM
R&W R&W 000b
Limitation of negative password authentication attempts. After
reaching the limit, protected area is not accessible any longer.
000b: limiting of negative password authentication attempts
disabled.
001b-111b: maximum number of negative password
authentication attempts is 2AUTHLIM
Password (PWD)
31-0 PWD
R&W R&W FFFFFFFFh 32-bit password used for memory access protection.
Reading PWD always returns 00000000h
Password Acknowledge (PACK)
15-0 PACK
R&W R&W 0000h
16-bit password acknowledge used during the password
authentication process.
Reading PACK always returns 0000h
Protection bits (PT_I2C)
7-4 RFU
R
R
0000b
RFU - keep at 0000b
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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